EE587: Digital Systems Design and Synthesis

At the end of this course the students will learn the fundamental concepts and tools required to analyze, design, synthesize and test digital systems.

NO. OF CREDITS: 3
COMPULSORY/OPTIONAL: OPTIONAL
PREREQUISITES: EE252, EE322

MAIN TOPICS AND INTENDED LEARNING OUTCOMES

TOPICS

Review of digital systems design

Hardware description languages and behavioral synthesis of digital system

Behavioral synthesis data structures and algorithms

Synthesis and design space

Scheduling algorithms – constructive

Allocation and binding algorithms

Interconnect allocation and optimization

Transformational/iterative approaches

Test synthesis for digital systems

Student will be able to,

ILO1: Describe the design of complex digital systems using a (Verilog based) behavioural synthesis approach.

ILO2: Implement the algorithms which underpin behavioural synthesis including scheduling, allocation and binding.

ILO3: Apply behavioural synthesis to generate designs optimised for user-defined constraints.

ILO4: Describe digital design for testability techniques at the behavioural and RTL levels.

ILO5: Use emerging System on Chip (SoC) design and test methods.

ILO6: Describe system level low power design methods.

NO	RECOMMENDED TEXT
1	Samir Palnitkar, “Verilog HDL”
2	Michael D. Ciletti , “Advanced Digital Design with the Verilog HDL”
3	Giovanni De Micheli, “Synthesis and optimisation of digital circuits”
4	SabihGerez, “Algorithms for VLSI design automation”
5	John P Elliott, “Understanding behvioural synthesis"

TIME ALLOCATION	HOURS
Lectures	30
Tutorials	0
Assignments	12
Laboratories	18

ASSESMENT	PERCENTAGE
Assignments	30
Laboratory Work	10
MID Semester Evaluation	20
END Semester Exam	40